Design Verification at NIKSPERRI

Analog Field Applications Engineer – FAST Rotation Program at Texas Instruments

Hello Dear Readers, Currently at Texas Instruments vacancy for Analog Field Applications Engineer – FAST Rotation Program role. As a global semiconductor company operating in 35 countries, Texas Instruments (TI) is first and foremost a reflection of its people. From the TIer who unveiled the first working integrated circuit in 1958 to the more than 30,000 TIers worldwide who design, manufacture and sell analog and embedded processing chips, we are problem-solvers collaborating to change the world through technology. Put your talent to work with us – change the world, love your job! TI’s FAST (Field Applications & Sales Training) Rotation Program is designed to prepare Sales & Applications team members for customer-oriented careers that pair technical skills with business perspectives. The program provides experiences that help rising TIers understand how to successfully grow TI’s business and to thrive throughout their entire TI career. There are two available FAST p...

Intern-ASIC Design at Ansys Semiconductor

Hello Dear Readers, Currently at Ansys Bangalore vacancy for Intern role. Ansys is the global leader in engineering simulation, helping the world's most innovative companies deliver radically better products to their customers. By offering the best and broadest portfolio of engineering simulation software, Ansys helps companies solve the most complex design challenges and engineer products limited only by imagination . Summary / Role Purpose As a Product Specialist intern, you will be part of the team responsible for the overall development and validation of Ansys EDA Products. This involves working with Software developers, Architects, Application Engineers, and Semiconductor Customers, from ideation all the way to final product release and deployment. Key focus areas will include all areas related to IP/SoC/3DIC Power Integrity, Signal Integrity, Reliability aspects like EM/ESD/Thermal, Advanced timing/jitter, Packaging – the top challenges for any chip design on advance...

ASIC Design Engineer - Hardware at NVIDIA

Hello Dear Readers, Currently at Nvidia Bangalore vacancy for ASIC Design Engineer-Hardware role. As a member of our ASIC backend/timing team, you'll be working on product designs, focusing on such tasks as clocks, timing convergence, chip layout planning, design optimization and automation of work flows. Specifically, you'll be focusing on full chip layout planning (partitioning, planning clock distribution and other structures, methodology), full chip timing closure signoff (using tools such as Synopsys Primetime, Cadence Tempus etc.), design optimization, and gate-level design of high-speed logic. In this role you will also interface with architecture, rtl design, layout implementation, methodology and custom design teams to drive design implementation, timing analysis/closure all the way from micro-architecture to tape-out. What you'll be doing: Develop and enhance timing analysis/signoff work flow from frontend (pre-layout) ...

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