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Logic Design Engineer Vacancy at Atlas Silicon

  Hello Dear Readers, 

Currently at Atlas Silicon vacancy for Logic Design Engineer role.

ASIC Logic Design Engineers:

The ideal candidates for this position will have:

  • Working on the next generation protocols for AI applications
  • Understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create architecture and micro-architecture with detailed design documents for some of the components of the design for medium to high complexity functionality.
  • Be an individual contributor in the Design Tasks – RTL coding of design, synthesis, CDC analysis, debugging, Test development, etc.
  • May need to interact with customers to discuss/ understand customers’ specification requirements if needed.
  • The candidate will work in a project and team-oriented environment with teams.

Preferred skills for this role include:

  • Extensive experience in ASIC designing, RTL programming, Microarchitecture on major blocks, Verilog & Verification skills.
  • Solid understanding of ASIC design flow – logic design, verification, synthesis, STA, and backend.Language Proficiency - C/C++, Python, MATLAB 4. Good knowledge in at least one/two of these protocols - HBM or DDR, Ethernet, Interlaken, AMBA.
  • Exposure to Integration of PCIe, DDR, HBM, MIPI, CPU IPs in AI/ML and High-performance computing applications.
  • Across 2- 15 years of experience.

ASIC Physical Design Engineers:

  • Experience in the physical design flow, which includes RTL Synthesis, Floorplanning, Placement of cells, Clock Tree Synthesis, and Routing.
  • Solid Knowledge of Sign off checks like Static Timing Analysis, IR drop checks, Physical verification Checks, Logical Equivalence checks, and Low Power checks.
  • Scripting Languages Like Perl, TCL.
  • EDA Tool knowledge, Experience with Cadence PNR/STA tools and Calibre, and good scripting/automation skills.
  • Advanced skills in Fin FET node designs.
  • Across 2-15 Years of Experience.
  • Exposure to Integration of PCIe, DDR, HBM, MIPI, CPU IPs in AI/ML, and High-performance computing applications would be an added advantage

Verification Engineers:

The ideal candidates for this position will have:

  • Delivered with (as applicable) ASIC design verification, SystemVerilog languages (UVM, SVA), low power verification (UPF methodology), software/hardware co-verification (SystemC/C/C++).
  • Interfaced with designs/teams with embedded analog/mixed-signal design blocks.
  • Track record of being a hands-on, involved engineering team player who delivered successful silicon ASICs.
  • Been comfortable interacting with customers, cross-domain teams.
  • Enthusiasm to take ownership, contribute to realizing innovative, landmark products and company

Preferred skills for this role include:

  • Skills in ASIC / FPGA verification (directed test or System Verilog / UVM).
  • Coverage-based verification flow.
  • Working knowledge in modeling languages Verilog or VHDL
  • Good knowledge of simulation flow.
  • Good basis in scripting Python, and Perl.
  • Across 2- 10 Years of Experience.

Apply Here

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