Hello Dear Readers,
Currently at Business Fundamental Consulting vacancy for Physical Design Engineer role.
BE/MTech/MS with 4+ years from reputed universities with First class and experience as below.
- Required soft skills Customer orientation, English language proficiency, Good collaboration, and interpersonal skills. Good analytical and problem-solving skills along with strong ownership, commitment and time management.
- Floor planning/Power planning and Place and Route at block level and chip level.
- Expert user of Synopsys ICC2 (or Cadence Innovus) Floor-planning, Place & Route and Clock Tree Synthesis.
- Experience in Timing closure, Primetime or Tempus.
- In-depth knowledge of CTS and customized clock implementations.
- Knowledge of SI prevention and fixing techniques.
- Participated in timingecos and timing closure related PD activities.
- Proficiency in pre-silicon and post-silicon ECO implementation.
- Knowledge of DCT and interacted with tools like PT/ physical guidance.
- Experience in STA/ Synthesis and Formality tools (Desired).
- Execute physical verification checks (LVS, DRC, ANT, DFM, etc).
- Familiarity with tape out process for various fabs (10nm & below).
- Knowledge of power analysis tools like Redhawk preferred. Preferably analyzed or debugged EM, and IR issues in full chip multi-corner analysis.
- Interact with the CAD team to ensure coordination on layout related tools/libraries/scripts for timely release.
- Interface with other design engineers , provide feedback and implement enhancements as part of design methodology.
- improvements to improve product cycle times.
- Experience in Microcontrollers or similar IC designs on 90nm/40nm process nodes (Desired).
- Strong verbal and written communication skills with global teams.
- Good knowledge in ICV/Calibre.
- Good exposure to scripting with TCL, PERL, or Python
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