Skip to main content

Engineer position at Infineon

  Hello Dear Readers,

Currently at Infineon Bangalore vacancy for Engineer position role.

Quick Info:

LocationBangalore (India)
Work experience0-1 year
Job ID361205
Start dateas soon as possible
TypePart-time
ContractTemporary

Job description:

  • In-depth knowledge in ARM-based SoC architecture
  • Strong system-level understanding of CPU/SoC architecture, Memories (Flash, RAM)
  • Comfortable working primarily in a lab environment
  • Strong Embedded C skills, experience in low-level drivers development
  • Strong scripting skills in one of the major languages: e.g. Perl, Python, Tcl, bash
  • The good experimental technique, techniques of problem localization and root-cause
  • Hands-on experience in a lab, and familiar with lab equipment

Your Profile:

  • In-depth knowledge in ARM based SoC architecture
  • Strong system level understanding of CPU/SoC architecture, Memories (Flash, RAM)
  • Comfortable working primarily in a lab environment
  • Strong Embedded C skills, experience in low-level drivers development

 

Comments

Popular posts from this blog

Physical Design Engineer- ICE at Intel

  Hello Dear Readers, Currently at Intel Bangalore vacancy for Physical Design Engineer- ICE role. Job Description: Responsibilities may be quite diverse and are technical in nature. Creates bottoms-up elements of chip design including but not limited to cell, and block-level Semi-custom layouts, FUB-level floor plans, abstract view generation, RC extraction and schematic-to-layout verification, reliability verification and debug using phases of physical design development including parasitic extraction, custom polygon editing, auto-place and route algorithms, floor planning, full-chip assembly, packaging, and verification. Troubleshoots a wide variety up to and including difficult design issues and applied proactive intervention. Schedules, staffs, executes and verifies complex chips development and execution of project methodologies and/or flow developments. Requires expansive knowledge and practical application of methodologies and physical design. Qualifications: Education...

ASIC Design Engineer - Hardware at NVIDIA

  Hello Dear Readers, Currently at Nvidia Bangalore vacancy for ASIC Design Engineer-Hardware role. As a member of our ASIC backend/timing team, you'll be working on product designs, focusing on such tasks as clocks, timing convergence, chip layout planning, design optimization and automation of work flows. Specifically, you'll be focusing on full chip layout planning (partitioning, planning clock distribution and other structures, methodology), full chip  timing closure signoff (using tools such as Synopsys Primetime, Cadence Tempus etc.), design optimization, and gate-level design of high-speed logic. In this role you will also interface with architecture, rtl design, layout implementation, methodology and custom design teams to drive design implementation, timing analysis/closure all the way from micro-architecture to tape-out. What you'll be doing: Develop and enhance timing analysis/signoff work flow from frontend (pre-layout) ...

JRF and PhD Position: at BITS Pilani Hyderabad

  Hello Dear Readers, Currently at BITS Pilani Hyderabad vacancy for JRF and PhD Position role. There is  one vacancy for the JRF Position on a DST-SERB-sponsored research project in the department of EEE at BITS Pilani Hyderabad. The fellowship amount is ₹31000 per month + HRA.   ๐„๐ฅ๐ข๐ ๐ข๐›๐ข๐ฅ๐ข๐ญ๐ฒ ๐ซ๐ž๐ช๐ฎ๐ข๐ซ๐ž๐ฆ๐ž๐ง๐ญ๐ฌ:   M.E./M. Tech in ECE/ VLSI/ Microelectronics/ Digital Design/ Embedded System or equivalent or  M.Sc .  Electronics with at least 60% marks and GATE/NET qualification.  Knowledge of FPGA prototype, Verilog/ VHDL, Xilinx Vivado/ ISE tool, and Matlab are mandatory.  Experience in implementing the communication protocols such as I2C, SPI, WiFi, Zigbee, LoRa, etc can be the added advantage.     ๐๐Ž๐“๐„: ๐Ÿ. ๐†๐€๐“๐„/๐๐„๐“ ๐œ๐š๐ง ๐›๐ž ๐ž๐ฑ๐ž๐ฆ๐ฉ๐ญ๐ž๐ ๐Ÿ๐จ๐ซ ๐ญ๐ก๐ž ๐Œ.๐„./๐Œ.๐“๐ž๐œ๐ก. ๐ฌ๐ญ๐ฎ๐๐ž๐ง๐ญ๐ฌ ๐Ÿ๐ซ๐จ๐ฆ ๐ญ๐ก๐ž ๐‚๐ž๐ง๐ญ๐ซ๐š๐ฅ ๐Ÿ๐ฎ๐ง๐๐ž๐ ๐ˆ๐ง๐ฌ๐ญ๐ข๐ญ๐ฎ๐ญ๐ž๐ฌ/ ๐”๐ง๐ข๐ฏ๐ž๐ซ๐ฌ๐ข๐ญ๐ข๐ž๐ฌ ๐ฐ๐ข๐ญ๐ก ๐ ๐จ?...