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Graduate Intern- Post Silicon Validation at Intel

 Hello Dear Readers,

Currently at Intel Bangalore vacancy for post-silicon validation graduate intern for batch 2023 batch.

Job Description: 

  • Pursuing Master's in Hardware Engineering or Electrical/Electronic Engineering or Computer Engineering or Computer Science.
  • Excellent Problem-solving skills combined with good communication skills required to work in a high dynamic cross-team and cross-site environments. Ability to learn fast.
Big Plus if you have any of the following knowledge:

Qualifications:

  • Usage of any Post-Si debug tools (e.g., logic analyzers, oscilloscopes, things like ChipScope on FPGA's, etc.)
  • C/C++ and Python are the most useful languages for our work.
  • VLSI concepts-Power Management / Reset
  • Familiarity with FW (embedded uC) debug ARC or Extensa LX-series uC preferred
  • Knowledge of ARM PM concepts (e.g., P/Q-channel)
  • General clocking concepts (PLL's, RO's, etc.)
  • Ability to debug interactions between different microcontrollers
  • Understanding power delivery concepts, VR interactions, etc -Mesh / Coherency
  • Knowledge of coherence algorithm (MESI, MOESI, MESIF, etc.).
  • Experience with SoC fabrics (AXI, ACE or other AMBA protocols).
  • Understanding transaction flows through the system. PCI Express (we can leverage this expertise for other IO's, like CXL).
  • Familiarity with any generation of the PCI Express specification usage of 3rd party PCIe Analyzers is very helpful (Tek, Lecroy, etc.)
  • Memory Expertise in any DDR technology.
  • Usage of 3rd party DDR Analyzers very helpful (Tek, Lecroy, etc.)

          

Job Type:

Student / Intern


Connect with me 

Comments

  1. AnonymousAugust 6, 2022 at 5:21 AM

    I got a call thanks bro for posting

    ReplyDelete
  2. AnonymousAugust 7, 2022 at 2:44 AM

    I am also got a call for technical interview round ๐Ÿ˜Œ๐Ÿ˜Œ

    ReplyDelete

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