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  Hello Dear Readers,   Currently at  Smart IOPS  vacancy for  Logic Design and Verification Engineer role. Smart IOPS  is an advanced-stage startup founded in 2013 and headquartered in Silicon Valley. Our engineering and development offices are situated in Bengaluru and Thiruvananthapuram. We develop high-performance storage solutions for High-Performance Computing (HPC) and performance-critical Enterprise applications. We have engineered and developed very high-speed NVMe SSDs that exhibit best-in-class NVMe performance. We are involved in cutting-edge research that is demonstrated by the 30+ patents that are in various stages of approval with the USPTO. Our major engagements include marquee names such as NASA, the United States Department of Energy, etc. We have immediate requirements for Logic Design and Verification Engineers with 2-8 years of relevant experience at our Bangalore/Trivandrum design centers. The Job description is given below. In the rol...

   Hello Dear Readers,   Currently at Atlas Silicon  vacancy for  Logic Design Engineer role. ASIC Logic Design Engineers: The ideal candidates for this position will have: Working on the next generation protocols for AI applications Understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create architecture and micro-architecture with detailed design documents for some of the components of the design for medium to high complexity functionality. Be an individual contributor in the Design Tasks – RTL coding of design, synthesis, CDC analysis, debugging, Test development, etc. May need to interact with customers to discuss/ understand customers’ specification requirements if needed. The candidate will work in a project and team-oriented environment with teams. Preferred skills for this role include: Extensive experience in ASIC designing, RTL programming, Microarchitecture on major blocks, Verilog & Veri...

  Hello Dear Readers,   Currently at  FrenusTech Pvt Ltd    vacancy for  Physical Design Engineer role. FrenusTech is one of the fastest-growing and stability-oriented Semiconductor design services companies in Bangalore. They have a strong client base in India, the US, Taiwan, and growing into other geographies. They have started in April 2017 and have a team of 130+ engineers working across domains of VLSI & Embedded systems. They have been growing at 40% - 50% year on year over the last 4 years including the period of Covid-19. They currently focus on end-to-end IC Design Services for IoT, Mobile, NextGen Automobile technologies. They provide solutions to building System On Chips involving both Digital & Analog design. The core leadership team brings in vast expertise from various domains of VLSI design: Digital Design, Verification, and Physical Design (P & R). Analog & Mixed-Signal - Design, Layout, and Verification. Foundation IPs- IOs...

  Hello Dear Readers,   Currently at Seagate  vacancy for Staff Engineer - ASIC Verification role. About our group: Seagate VLSI Group in Pune works with other Geographical teams to develop HDD Controller chips, used in Seagate Hard Drives. This position is for VLSI Design Verification team that works with Seagate SoC and IP teams and our vendor(s) to successfully perform functional verification of Seagate’s industry leading SoCs and IP blocks. This position will be responsible for verification activities for various SoC developments and IP blocks, as well as ASIC verification environment support. About the role - you will:  Develop Test-bench / Environment / Reference model for Verification of IP, Processor Subsystems.  Develop random constrained testing with System Verilog, UVM using VCS. Document and Implement Verification Plans. Develop reusable verification environments to be used across multiple projects. Write test cases, as needed, to enhance F...

Hello Dear Readers,   Currently at Synopsys vacancy for Applications Engineer, II. Job Description and Requirements: Customer Success Group is looking for an Applications Engineer to join our team. The role is to drive the latest technology productization and deployment at the customer's end. A person should be capable to lead technical initiatives to innovate and keep a technical edge in products for a competitive environment. Key Qualifications: Good Analytical skills Strong HDL language support (Verilog, VHDL, System Verilog) Digital design fundamental and RTL coding understanding Synthesis and timing concepts understanding Clock Domain Crossing (CDC) / Reset Domain Crossing (RDC) working knowledge preferred. Good Debugging skills. Scripting – Perl, Tcl, Make, Shell Scripting. Role - Static Technology Deployment & Support designers to resolve roadblocks                                 ...

  Hello Dear Readers,   Currently at NXP Semiconductors vacancy for ASIC, RTL, SoC, Wireless Modem, MicroArchitecture engineer.  Responsibilities: Play key team member role in Connectivity SOC & digital IPs development from Micro-Architecture to RTL implementation Hands on contributor to IP & SOC digital design/Integration from scratch Translate Micro-Architecture specification to Implementation specification Actively contribute to IP Scalability, Reuse and Automation methodologies in scope of Design Actively participate in technical challenges discussion and decision-making within IP scope. Profile: Experience in ASIC/SoC front-end (preferably RTL Verilog and VHDL based) design and methodologies. Earlier experience with SoC Processor based architectures needed. ARM experience would be added advantage. Self-driven and capable for independent work and independent decision making. Knowledge in frontend design experience on IPs involve ARM processor-based s...