Hello Dear Readers,
Currently at NXP Semiconductors vacancy for ASIC, RTL, SoC, Wireless Modem, MicroArchitecture engineer.
Responsibilities:
Play key team member role in Connectivity SOC & digital IPs development from Micro-Architecture to RTL implementation
Hands on contributor to IP & SOC digital design/Integration from scratch
Translate Micro-Architecture specification to Implementation specification
Actively contribute to IP Scalability, Reuse and Automation methodologies in scope of Design
Actively participate in technical challenges discussion and decision-making within IP scope.
Profile:
- Experience in ASIC/SoC front-end (preferably RTL Verilog and VHDL based) design and methodologies.
- Earlier experience with SoC Processor based architectures needed. ARM experience would be added advantage.
- Self-driven and capable for independent work and independent decision making.
- Knowledge in frontend design experience on IPs involve ARM processor-based sub-system, Serial Standard interfaces, and Memory controllers.
- Exposure to Low-power design, System Security considered as added advantage.
- Hands on front-end design of complex multi clock domain blocks.
- Fluency in design & verification languages such as VHDL, Verilog, C and System Verilog.
- Experience in Spyglass for lint and CDC checks.
- Experience in using Cadence RC for synthesis and LEC flow.
- Experience in identifying and implementing complex ECO in the netlist.
- Working knowledge of csh/Perl scripting.
- Knowledge of Verification Methodologies to actively participate in Debug Analysis.
Connect with me
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